1. Field of the Invention
The present invention relates to a data processing control system including a plurality of identical processors and a plurality of memory units to which the processors have access. Only a single one of the processors is allowed to execute predetermined programs at a given time. At least one other of the identical processors may be used to execute programs in event of failure of the first one.
2. Description of the Prior Art
Data processing control systems are already known wherein one processor, or a master processor, is a predetermined invariable one. The drawback of such known systems is that a failure in the master processor disables the entire system. Another drawback is that the master processor is generally a specialized one which is different from the other processors.